DESIGN OF REVERSIBLE TECHNOLOGY BASED PARITY GENERATOR
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Abstract
Current generation processors based on CMOS technology are facing heat dissipation problem. Reversible technology overcome this problem. Logical and physical reversibility based gate primitives can be implemented using Quantum-dot Cellular Automata (QCA) based nanotechnology. In this paper, reversible based gates are implemented using QCA technology. Further, parity generator is developed with the help of reversible gates. The basic parameters like area, power are calculated for the proposed reversible parity generator.
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References
- G. Moore, "The Future of Integerated Electronics," Fairchild Semiconductor Internal Publication, vol. vol.38, p. 8, April 1965.
- D. M. Frank, "Quantum Computer Architecture for Physical Simulations," in James H.simons Conferences on Quantum Computation for physical Modeling Workshop, University Of Florida, May 2002.
- C. H. Bennett, "Logical Reversibility of Computation," IBM Journal Of Research and Development, vol. 17, pp. 525-532, 1973.
- Landuer.R, "Irreversibility and Heat Generation in the Computation Process," IBM Journal of Research and development, pp. 525-532, Novemeber 1973.
- Jadav Chandra Das, Debashis De. "Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication", Frontiers of Information Technology & Electronic Engineering, 2016
- N. Kaulgud, "Quantum dot cellular automata (QCA) design for the realization of basic logic gates," in 2017 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT), Mysuru, India, 2017.
- R. Chakrabarty, "Implementation of standard functions using universal gate in QCA designer," in 2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech), kolkata,India, 2017.
- R. Sabbaghi-Nadooshan, "Innovative model for ternary QCA gates," IET Circuits, Devices & Systems, vol. 12, no. 2, 2018.
- H.Thapliyal, "Design of reversible sequential circuits optimizing quantum cost,delay,and garbage outputs," in international Conference on VLSI design, Bangalore,India , 2010.
- M. Saeedi, "Reversible Circuit Synthesis Using a Cycle Based Approach," journal Of Engineering Technologies in computing sytem, vol. 6, pp. 232-233, 2010.